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  • Introduction
  • LimeDSP Algorithms
    • LimeADPD
      • Indirect Learning Architecture
      • Complex Valued Memory Polynomial
      • LimeADPD Equations
      • Training Algorithm
    • LimeADPD I/Q - DPD with I/Q Imbalance Mitigation
      • Transmitter I/Q imbalance
      • LimeADPD I/Q Indirect Learning Architecture
      • Complex Valued Memory Polynomial
      • LimeADPD I/Q Equations
      • LimeADPD I/Q Training Algorithm
    • Crest Factor Reduction (CFR)
      • Motivation for Peak to Average Power Ratio Reduction
      • Peak Windowing Method
    • Lime Equaliser - The I/Q Imbalance Correction and Gain Flattening
      • Mathematical Background of the Equaliser Design Procedure
      • The Amplitude Response, Phase Response and Group Delay of FIR Filter
  • Implementation Platform
    • LimeSDR-PCIe-5G
      • LMS1 transmit path
      • LMS2 transmit path
      • Equaliser implementation
    • LimeSDR-QPCIe
  • Board Programming
    • LimeSDR-PCIe-5G
      • Hardware configuration
      • FPGA gateware bitstream generation
      • Uploading FPGA gateware bitstream to the FLASH memory
    • LimeSDR-QPCIe
      • Uploading FX3 Firmware to SPI FLASH Memory
      • PCIe IP core generation
      • FPGA gateware bitstream generation
      • Uploading FPGA gateware bitstream to FLASH memory
  • LimeSuiteGUI
    • LimeSDR-PCIe-5G
      • Board related controls window
      • LMS2/LMS3 clock configuration
      • LMS1 CFR, LMS3 RxTSP controls window
      • LMS2 CFR controls window
    • LimeSDR-QPCIe
      • Board Related Controls window
  • Board Configuration Guide
    • LimeSDR-PCIe-5G
      • Connecting to the board
      • LMS1 DPD Hardware Configuration
      • LMS1 DPD Software Configuration
      • LMS2 Equaliser Hardware Configuration
      • LMS2 Equaliser Software Configuration
    • LimeSDR-QPCIe
      • Hardware Configuration
      • LimeSuiteGUI settings
  • LimeDSP User Guides
    • CFR Configuration
    • DPDViewer Window
    • DPDControl Application
    • Equaliser Application
  • Measured Results
    • DPD Results
      • LimeSDR-PCIe-5G
        • Hardware Setup
        • Test Case 1: LTE 5MHz Low IF, Maxim Integrated MAX2612 PA
        • Test Case 2: Ten-tone Low IF, Maxim Integrated MAX2612 PA
        • Test Case 3: 10MHz LTE, 1W modulated output power amplifier
      • LimeSDR-QPCIe
        • Hardware Setup
        • Test Case 1: 10MHz LTE, Maxim Integrated MAX2612 PA
        • Test Case 2: 20MHz LTE, Maxim Integrated MAX2612 PA
        • Test Case 3: 10MHz LTE, 10W modulated output power amplifier
    • CFR Results
      • Hardware Setup
      • Test Case 1: LTE 5MHz
      • Test Case 2: LTE 10 MHz
      • Test Case 3: LTE 15 MHz
      • Test Case 4: LTE 20 MHz
    • Equaliser Results
      • Hardware Setup
      • Results
  • Conclusion
    • LimeADPD
    • LimeADPD I/Q
    • Equaliser
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© Copyright 2017-2022, Lime Microsystems. Last updated on Dec 07, 2023.